A 5.4GHz wide tuning range CMOS PLL using an auto-calibration multiple-pass ring oscillator

Summary, in English

A 5.4GHz multiple-pass ring voltage controlled oscillator (VCO) based phase-locked loop (PLL) is described. For the sake of active devices’ sensitivity to process and temperature regarding ring oscillators, an effective automatic frequency calibration scheme is proposed. A new process-independent differential to single (DTOS) is

used to adjust control voltage range and loop gain. The chip is implemented in 0.18-um CMOS process

and achieves phase noise of -100dBc/Hz@1MHz

and a 40% tuning range.

• Author: Ping Lu; Danfeng Chen; Junyan Ren
• Department/s: Department of Electrical and Information Technology
• Publishing year: 2009
• Language: English
• Pages: 39-42
• Publication/Series: [Host publication title missing]
• Links: http://dx.doi.org/10.1109/SOCCON.2009.5398102
• Document type: Conference paper
• Topic: Electrical Engineering, Electronic Engineering, Information Engineering
• Conference name: IEEE international SOC conference, SOCC 2009
• Conference date: 2009-09-09 - 2009-09-11
• Conference place: Ireland
• Status: Published
• Research group: Data converters & RF
• ISBN/ISSN/Other: ISBN: 978-1-4244-4940-8