A low noise PLL based FM audio transmitter in 0.35 μm CMOS technology

Summary, in English

PLL (Phase Locked Loop) based frequency synthesizers are widely used in the wireless communication field. This paper puts focus on the design and implementation of a 60dB SNR (Signal to Noise Ratio) FM transmitter, which realizes direct frequency modulation of audio signal by utilizing a carrier frequency ranging from 78MHz to 108MHz, with a 100 kHz channel selection resolution. Fabricated in standard 0.35μm CMOS technology, this PLL's core circuit takes an area of 745×700 μm2. The transmitter has a total power consumption of below 56mW for a 3V supply, and the strongest measured spur is below -50dBc.

• Author: Yan Lu; Yiming Huo; Johan Wernehag; Henrik Sjöland
• Department/s: Department of Electrical and Information Technology; ELLIIT: the Linköping-Lund initiative on IT and mobile communication
• Publishing year: 2010
• Language: English
• Pages: 202-205
• Publication/Series: [Host publication title missing]
• Links: http://dx.doi.org/10.1109/PRIMEASIA.2010.5604927
• Document type: Conference paper
• Publisher: IEEE - Institute of Electrical and Electronics Engineers Inc.
• Topic: Electrical Engineering, Electronic Engineering, Information Engineering
• Conference name: Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia), 2010 Asia
• Conference date: 2010-09-22
• Status: Published
• Research group: Analog RF
• ISBN/ISSN/Other: ISBN: 978-1-4244-6735-8; E-ISBN 978-1-4244-6736-5