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A Power-Scalable DCO for Multi-Standard GSM/WCDMA Frequency Synthesizers

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Author

Summary, in English

A Digitally Controlled Oscillator (DCO) whose power consumption can be reconfigured while maintaining an almost constant phase-noise figure-of-merit (FoM). This is achieved by using either a single-switch-pair or a complementary (i.e., double-switch-pair) oscillator topology, without disturbing the optimized LC tank of the DCO. The optimal power consumption in the complementary (P-N) configuration is reduced by 75% compared to the single-switch-pair (N-only) configuration, while the FoM is kept constant. Measurements on a 55 nm CMOS 4 GHz DCO prototype show a minimum phase noise of -129.3 dBc/Hz at 2 MHz offset from the carrier in the P-N configuration, and of -134.7 dBc/Hz in the N-only configuration, with a phase noise difference very close to the 6 dB expected from theory. The current consumption is 6 mA and 24 mA, respectively, resulting in approximately the same FoM of -185 dBc/Hz.

Publishing year

2014

Language

English

Pages

646-656

Publication/Series

IEEE Journal of Solid-State Circuits

Volume

49

Issue

3

Document type

Journal article

Publisher

IEEE - Institute of Electrical and Electronics Engineers Inc.

Topic

  • Electrical Engineering, Electronic Engineering, Information Engineering

Keywords

  • WCDMA
  • reconfigurability
  • reconfigurable
  • power scalable
  • phase noise
  • oscillator
  • DCO
  • GSM

Status

Published

ISBN/ISSN/Other

  • ISSN: 0018-9200