The browser you are using is not supported by this website. All versions of Internet Explorer are no longer supported, either by us or Microsoft (read more here: https://www.microsoft.com/en-us/microsoft-365/windows/end-of-ie-support).

Please use a modern browser to fully experience our website, such as the newest versions of Edge, Chrome, Firefox or Safari etc.

Two 130nm CMOS class-D RF power amplifiers suitable for polar transmitter architectures

På svenska

Author

Summary, in English

Two class-D RF power amplifiers consisting of CMOS inverter chains have been designed and measured. The first amplifier operates at 1GHz and has a maximum output power of 12dBm, whereas the second operates at 1.5GHz and outputs a maximum of 6dBm. The amplifiers have been characterized for use in two different polar transmitter architectures, Pulse Width Modulation by Variable Gate Bias (PWMVGB) and Envelope Elimination and Restoration (EER). Using a standard 130nm digital CMOS process and off-chip passive components, maximum drain efficiencies of 32% and 39%, respectively, are achieved.

The two amplifiers are compared with respect to output power and drain efficiency, including a qualitative analysis of losses. Moreover, their use in the two polar transmitter architectures is discussed.

Publishing year

2008

Language

English

Pages

1372-1375

Document type

Conference paper

Topic

  • Electrical Engineering, Electronic Engineering, Information Engineering

Keywords

  • polar transmitter
  • class D
  • CMOS
  • power amplifier

Conference name

9th International conference on solid-state and integrated circuit technology

Conference date

2008-10-20 - 2008-10-23

Conference place

Beijing, China

Status

Published

Research group

  • Analog RF