InAs nanowire MOSFETs in three-transistor configurations: single balanced RF down-conversion mixers.

Summary, in English

Integration of III-V semiconductors on Si substrates allows for the realization of high-performance, low power III-V electronics on the Si-platform. In this work, we demonstrate the implementation of single balanced down-conversion mixer circuits, fabricated using vertically aligned InAs nanowire devices on Si. A thin, highly doped InAs buffer layer has been introduced to reduce the access resistance and serve as a bottom electrode. Low-frequency voltage conversion gain is measured up to 7 dB for a supply voltage of 1.5V. Operation of these mixers extends into the GHz regime with a [Formula: see text] cut-off frequency of 2 GHz, limited by the optical lithography system used. The circuit dc power consumption is measured at 3.9 mW.

• Author: Martin Berg; Karl-Magnus Persson; Jun Wu; Erik Lind; Henrik Sjöland; Lars-Erik Wernersson
• Department/s: Department of Electrical and Information Technology; NanoLund: Centre for Nanoscience; ELLIIT: the Linköping-Lund initiative on IT and mobile communication
• Publishing year: 2014
• Language: English
• Publication/Series: Nanotechnology
• Volume: 25
• Issue: 48
• Links: http://dx.doi.org/10.1088/0957-4484/25/48/485203
• Document type: Journal article
• Publisher: IOP Publishing
• Topic: Nano Technology
• Status: Published
• ISBN/ISSN/Other: ISSN: 0957-4484